As the performance of integrated circuits continues to increase, the data transfer rates between packaged devices on a circuit board or between different circuit boards often has a comparatively greater impact on system performance, requiring improvements to data transmission paths and the input/output (I/O) circuits that transfer information across the paths.
I/O circuits often include, or are comprised entirely of, one or more output buffers that each drive an input signal output by a transmitting device across a data transmission path to a receiving device. Output buffers typically receive an input signal in one format that is compatible with the transmitting device and output a corresponding output signal in a format that is compatible with the data transmission path. Another function of an output buffer is to effectively isolate, or buffer, the transmitting device from the data transmission path.
One type of output buffer used for digital data transfer is a single-ended output buffer, which converts an input signal to a digital output signal referenced to ground. Often, the input signal is a single input also referenced to ground.
As an alternate to single-ended output buffers, differential output buffers are used to drive a balanced output signal across a pair of interconnects to a receiving device, providing several advantages over single-ended output buffers. For instance, differential output buffers reduce noise by eliminating "ground bounce". Differential output buffers also dissipate only a fraction of the power of single-ended data transfer output buffers.
Conventional differential output buffers suffer from dependencies on supply voltages, operating temperatures, and process variations during manufacture that cause output signal variations. In some applications, these dependencies limit the operating environment and implementation in order to produce an output signal that may be accurately received across the data transmission path. In particular, these dependencies cause variations in an output common-mode voltage ("common mode") of a differential output buffer. Thus, a voltage bias to each interconnect of the output buffer may vary over time with respect to the ground reference.
Countering the dependencies in conventional output buffers results in a number of limitations. For example, complex external heating and cooling equipment may be employed to maintain the operating temperature within a narrow range. As another example, more complex power supplies may be required to maintain a supply voltage within a narrow range.
It is also generally known to include compensation circuitry in an output buffer to reduce variations in the output signal. In addition to disadvantages associated with the added complexity, such compensation circuitry often introduces additional delays and data rate limitations on an output buffer that prevent higher data rates for high-speed communication systems.
Consequently, there exists a significant need for a differential output buffer that accurately produces an output signal for high-speed communication systems with increased tolerance for variations in supply voltage, operating temperature and process variations.
In addition to buffering for the power requirements and variations in data transmission systems, output buffers are often required to drive signals across data transmission paths between different transistor technologies.
For example, for low and medium operating frequencies, CMOS (Complementary Metal Oxide Semiconductor) integrated circuits are widely used due to a relatively small size and low power consumption as compared to other transistor technologies. At high operating frequencies, Emitter Coupled Logic (ECL) is typically used since power consumption of ECL is independent of operating frequency, whereas CMOS becomes relatively noisy and consumes significantly more power at higher frequencies, or is simply not fast enough.
Output buffers are often required to translate the differing voltage levels used in the different transistor technologies. Specifically, ECL typically operates at higher voltage levels than does CMOS. Thus, a low voltage differential output buffer is required to translate (level-shift) the high and low logic voltage levels of an input signal from an ECL transmitting device to a CMOS receiving device.
Optical communication systems are an example of an application for ECL-to-CMOS translators. Fiber optic transmission lines allow high-speed data rates. An optical receiver converts the optical pulses from the fiber optic transmission line into electrical pulses with a series of ECL devices capable of operating at the high data rates. Once converted to an input signal, the optical receiver acts as a transmitting device, passing the input signal to a digital CMOS protocol chip as a receiving device for further processing. An output buffer is used between the ECL transmitting and CMOS receiving devices.
A low voltage differential output buffer for level shifting between ECL and CMOS is often accomplished with emitter follower circuits downstream of a differential amplifier. However, emitter follower circuits typically have a temperature dependency that further impacts the performance of the output buffer.
Since it is often impractical or undesirable to maintain the operating environment of the output buffer, variations in the common mode of an output signal to a receiving device often necessitates encoding the data in the input signal. An encoded signal has an average value of zero, with as many high logic levels as low logic levels. Consequently, the data itself does not introduce a varying common mode to the output signal that would further complicate reception of an output signal containing variations due to temperature and supply voltage. However, the additional complexity of encoding may be impractical or undesirable for many applications. In addition, the encoded data in the output signal only avoids compounding the problem rather than solving it.
It also known to mitigate variations due to temperature and supply voltage with an output buffer biased by a plurality of negative power supplies providing multiple voltage levels. Moreover, these known output buffers generate output voltage levels over 3 V. Consequently, these known output buffers are inappropriate for noninverted single power supply applications, especially at output voltage levels under 3 V.
Increasingly, existing and anticipated receiving devices require lower voltage levels in order to achieve higher operating frequencies, for example, signals based on a upper voltage level of 1.25 V and less. These lower voltage levels generate less heat, compensating for the additional heat attributable to increased operating frequency. The smaller voltage differences also contribute to higher operating frequency by taking less time to switch between levels. Thus, the need for low voltage differential output buffers is increasing.
Consequently, a significant need exists for a low voltage differential output buffer that operates at a high data rate with increased tolerance for variations in supply voltage, operating temperature and process variations and maintains a stable output common mode voltage.